ARM CPU in VHDL
Built a VHDL microarchitecture that executes a subset of ARM instructions, connecting instruction decoding, datapath behavior, and control logic.
Built a VHDL microarchitecture that executes a subset of ARM instructions, connecting instruction decoding, datapath behavior, and control logic. Developed a practical understanding of how instruction semantics map to hardware execution.
The design develops the processor in stages. It connects the software view of instructions with the hardware structures that execute them, which informs my interest in architecture and performance.